Module: YTLJit::AssemblerUtilIA
- Includes:
- AssemblerUtilIAModrm
- Included in:
- GeneratorIABinary
- Defined in:
- lib/ytljit/instruction_ia.rb
Instance Method Summary collapse
- #common_arithxmm(dst, src, op0, op1, inst) ⇒ Object
- #common_cvt(dst, src, op0, op1, inst) ⇒ Object
- #common_cvt2(dst, src, op0, op1, inst) ⇒ Object
- #common_jcc(addr, opc, lopc, inst) ⇒ Object
- #common_movssd(dst, src, op, inst) ⇒ Object
- #common_operand_80(dst, src, bopc, optc, inst) ⇒ Object
- #common_operand_80_imm8(dst, src, optc, inst) ⇒ Object
- #common_setcc(dst, opc, inst) ⇒ Object
- #common_shift(dst, optc, shftnum, inst) ⇒ Object
- #nosupported_addressing_mode(inst, dst, src, src2 = nil) ⇒ Object
Methods included from AssemblerUtilIAModrm
#modrm, #modrm_indirect, #modrm_indirect_off32, #modrm_indirect_off8, #small_integer_32bit?, #small_integer_8bit?
Instance Method Details
#common_arithxmm(dst, src, op0, op1, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 753 def common_arithxmm(dst, src, op0, op1, inst) case dst when OpRegXMM case src when OpRegXMM rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, dst, src, dst, src) if op0 then ([op0] + rexseq + [0x0F, op1] + modseq).pack("C#{rexfmt}C2#{modfmt}") else (rexseq + [0x0F, op1] + modseq).pack("#{rexfmt}C2#{modfmt}") end when OpIndirect rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, dst, src, dst, src) if op0 then ([op0] + rexseq + [0x0F, op1] + modseq).pack("C#{rexfmt}C2#{modfmt}") else (rexseq + [0x0F, op1] + modseq).pack("#{rexfmt}C2#{modfmt}") end else return nosupported_addressing_mode(inst, dst, src) end else return nosupported_addressing_mode(inst, dst, src) end end |
#common_cvt(dst, src, op0, op1, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 784 def common_cvt(dst, src, op0, op1, inst) if dst.is_a?(OpRegXMM) and (src.is_a?(OpIndirect) or src.is_a?(OpReg32) or src.is_a?(OpReg64)) then rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, dst, src, dst, src) if op0 then ([op0] + rexseq + [0x0F, op1] + modseq).pack("C#{rexfmt}C2#{modfmt}") else (rexseq + [0x0F, op1] + modseq).pack("#{rexfmt}C2#{modfmt}") end else return nosupported_addressing_mode(inst, dst, src) end end |
#common_cvt2(dst, src, op0, op1, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 801 def common_cvt2(dst, src, op0, op1, inst) if (src.is_a?(OpRegXMM) or src.is_a?(OpIndirect)) and (dst.is_a?(OpReg32) or dst.is_a?(OpReg64)) then rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, dst, src, dst, src) if op0 then ([op0] + rexseq + [0x0F, op1] + modseq).pack("C#{rexfmt}C2#{modfmt}") else (rexseq + [0x0F, op1] + modseq).pack("#{rexfmt}C2#{modfmt}") end else return nosupported_addressing_mode(inst, dst, src) end end |
#common_jcc(addr, opc, lopc, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 682 def common_jcc(addr, opc, lopc, inst) addr2 = addr if addr.is_a?(OpMemory) then addr2 = addr.value end offset = addr2 - @asm.current_address - 2 if offset > -128 and offset < 127 and false then [opc, offset].pack("C2") else offset = addr2 - @asm.current_address - 6 [0x0F, lopc, offset].pack("C2L") end end |
#common_movssd(dst, src, op, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 721 def common_movssd(dst, src, op, inst) rexseq, rexfmt = rex(dst, src) case dst when OpRegXMM case src when OpRegXMM modseq, modfmt = modrm(inst, dst, src, dst, src) ([op] + rexseq + [0x0F, 0x10] + modseq).pack("C#{rexfmt}C2#{modfmt}") when OpIndirect modseq, modfmt = modrm(inst, dst, src, dst, src) ([op] + rexseq + [0x0F, 0x10] + modseq).pack("C#{rexfmt}C2#{modfmt}") else return nosupported_addressing_mode(inst, dst, src) end when OpIndirect case src when OpRegXMM modseq, modfmt = modrm(inst, src, dst, dst, src) ([op] + rexseq + [0x0F, 0x11] + modseq).pack("C#{rexfmt}C2#{modfmt}") else return nosupported_addressing_mode(inst, dst, src) end else return nosupported_addressing_mode(inst, dst, src) end end |
#common_operand_80(dst, src, bopc, optc, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 578 def common_operand_80(dst, src, bopc, optc, inst) case dst when OpReg8 case src when OpImmidiate8, Integer if dst.class == OpAL then [bopc + 0x4, src.value].pack("C2") else modseq, modfmt = modrm(inst, optc, dst, dst, src) ([0x80] + modseq + [src.value]).pack("C#{modfmt}C") end when OpReg8 modseq, modfmt = modrm(inst, dst, src, dst, src) ([bopc] + modseq).pack("C#{modfmt}") else return nosupported_addressing_mode(inst, dst, src) end when OpReg32, OpReg64 case src when OpImmidiate8 common_operand_80_imm8(dst, src.value, optc, inst) when OpImmidiate32, Integer srcv = nil if src.is_a?(Integer) srcv = src else srcv = src.value end if small_integer_8bit?(srcv) then return common_operand_80_imm8(dst, srcv, optc, inst) end rexseq, rexfmt = rex(dst, src) if dst.class == OpEAX or dst.class == OpRAX then [*rexseq, bopc + 0x5, srcv].pack("#{rexfmt}CL") else modseq, modfmt = modrm(inst, optc, dst, dst, src) (rexseq + [0x81] + modseq + [srcv]).pack("#{rexfmt}C#{modfmt}L") end when OpImmidiate64 srcv = src.value if small_integer_8bit?(srcv) then return common_operand_80_imm8(dst, srcv, optc, inst) end rexseq, rexfmt = rex(dst, src) if dst.class == OpEAX or dst.class == OpRAX then [*rexseq, bopc + 0x5, srcv].pack("#{rexfmt}CQ") else modseq, modfmt = modrm(inst, optc, dst, dst, src) (rexseq + [0x81] + modseq + [srcv]).pack("#{rexfmt}C#{modfmt}Q") end when OpReg32, OpReg64 rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, src, dst, dst, src) (rexseq + [bopc + 0x01] + modseq).pack("#{rexfmt}C#{modfmt}") when OpMem32, OpMem64 rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, src, dst, dst, src) (rexseq + [bopc + 0x03] + modseq).pack("#{rexfmt}C#{modfmt}") when OpIndirect rexseq, rexfmt = rex(src, dst) modseq, modfmt = modrm(inst, dst, src, dst, src) (rexseq + [bopc + 0x03] + modseq).pack("#{rexfmt}C#{modfmt}") else return nosupported_addressing_mode(inst, dst, src) end when OpIndirect case src when OpImmidiate8 rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, optc, src, dst, src) (rexseq + [0x83] + modseq + [src.value]).pack("#{rexfmt}C#{modfmt}") when OpImmidiate32, Integer rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, optc, src, dst, src) (rexseq + [0x81] + modseq + [src.value]).pack("#{rexfmt}C#{modfmt}L") when OpReg32, OpReg64 rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, src, dst, dst, src) (rexseq + [bopc + 0x1] + modseq).pack("#{rexfmt}C#{modfmt}") else return nosupported_addressing_mode(inst, dst, src) end end end |
#common_operand_80_imm8(dst, src, optc, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 571 def common_operand_80_imm8(dst, src, optc, inst) rexseq, rexfmt = rex(dst, src) modseq, modfmt = modrm(inst, optc, dst, dst, src) fmt = "#{rexfmt}C#{modfmt}C" (rexseq + [0x83] + modseq + [src]).pack(fmt) end |
#common_setcc(dst, opc, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 696 def common_setcc(dst, opc, inst) rexseq, rexfmt = rex(nil, dst) case dst when OpReg8, OpIndirect, OpMem8 modseq, modfmt = modrm(inst, 0, dst, dst, nil) (rexseq + [0x0F, opc] + modseq).pack("#{rexfmt}C2#{modfmt}") else return nosupported_addressing_mode(inst, dst, nil) end end |
#common_shift(dst, optc, shftnum, inst) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 707 def common_shift(dst, optc, shftnum, inst) rexseq, rexfmt = rex(dst, nil) modseq, modfmt = modrm(inst, optc, dst, dst, shftnum) if shftnum.is_a?(OpImmidiate8) then shftnum = shftnum.value end if shftnum == 1 then (rexseq + [0xD1] + modseq ).pack("#{rexfmt}C#{modfmt}") else (rexseq + [0xC1] + modseq + [shftnum]).pack("#{rexfmt}C#{modfmt}C") end end |
#nosupported_addressing_mode(inst, dst, src, src2 = nil) ⇒ Object
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# File 'lib/ytljit/instruction_ia.rb', line 566 def nosupported_addressing_mode(inst, dst, src, src2 = nil) mess = "Not supported addessing mode in #{inst} #{dst} #{src} #{src2}" raise IlligalOperand, mess end |