Class: CommonCFGReg

Inherits:
InfElm show all
Extended by:
BaseFunc
Includes:
BaseModule
Defined in:
lib/tdl/elements/common_configure_reg.rb,
lib/tdl/elements/common_configure_reg.rb

Overview

signals in interface

Instance Attribute Summary collapse

Attributes inherited from InfElm

#dimension

Attributes inherited from BaseElm

#belong_to_module

Class Method Summary collapse

Instance Method Summary collapse

Methods included from BaseFunc

check_same, check_same_class, check_same_clock, check_same_dsize

Methods included from BaseModule

#length, #to_s

Methods inherited from InfElm

#[], #dimension_num, #draw, inherited, #port_length, same_name_socket, #signal, subclass

Methods inherited from BaseElm

#matrix, #name_copy, #path_refs, recfg_nc, #s, #signal

Methods included from TdlSpace::ExCreateTP

#create_tp, #root_ref

Constructor Details

#initialize(name: "cfg_inf", dsize: 8, asize: 8, port: false, dimension: []) ⇒ CommonCFGReg

Returns a new instance of CommonCFGReg.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 6

def initialize(name:"cfg_inf",dsize:8,asize:8,port:false,dimension:[])
    name_legal?(name)
    super(dimension:dimension)
    @port = port
    @dsize = dsize
    @name = name
    @asize = asize
end

Instance Attribute Details

#asize ⇒ Object

Returns the value of attribute asize.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 5

def asize
  @asize
end

#dsize ⇒ Object

Returns the value of attribute dsize.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 5

def dsize
  @dsize
end

#ghost ⇒ Object

Returns the value of attribute ghost.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 5

def ghost
  @ghost
end

#id ⇒ Object

Returns the value of attribute id.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 5

def id
  @id
end

#name ⇒ Object

Returns the value of attribute name.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 5

def name
  @name
end

#port ⇒ Object

Returns the value of attribute port.



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# File 'lib/tdl/elements/common_configure_reg.rb', line 5

def port
  @port
end

Class Method Details

.parse_ports(port_array = nil) ⇒ Object

SV FILE PORT PARSE



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# File 'lib/tdl/elements/common_configure_reg.rb', line 29

def self.parse_ports(port_array=nil)
    rep = /(?<up_down>\(\*\s+(?<ud_name>stream_up|stream_down)\s*=\s*"true"\s+\*\))?\s*(common_configure_reg_interface\.)(?<modport>master|slaver)\s+(?<name>\w+)\s*(?<vector>\[.*?\])?/m
    up_stream_rep = /stream_up/

    InfElm.parse_ports(port_array,rep,"common_configure_reg_interface",up_stream_rep) do |h|
        h[:type] = CommonCFGReg
        yield h
    end
end

.sdlinst_t0(ele) ⇒ Object

SdlInst



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# File 'lib/tdl/elements/common_configure_reg.rb', line 41

def self.sdlinst_t0(ele)
    if ele.class ==  CommonCFGReg then
        "common_configure_reg_interface.#{ele.port}"
    else
        nil
    end
end

Instance Method Details

#__inf_signal__(name, index = 0) ⇒ Object 



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# File 'lib/tdl/elements/common_configure_reg.rb', line 54

def __inf_signal__(name,index=0)
    NqString.new(signal(index).concat ".#{name}")
    # signal.concat ".#{name}"
end

#__inf_signal_list_(lname, index = 0, h = nil, l = nil) ⇒ Object 



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# File 'lib/tdl/elements/common_configure_reg.rb', line 75

def __inf_signal_list_(lname,index=0,h=nil,l=nil)

    if h.is_a? Range
        l = h.to_a.min
        h = h.to_a.max
    end

    if h
        if l
            sqr = "[#{h.to_s}:#{l.to_s}]"
        else
            sqr = "[#{h.to_s}]"
        end
    else
        sqr = ""
    end
    NqString.new(signal(index).concat(".#{lname}").concat(sqr))
end

#inst ⇒ Object 



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# File 'lib/tdl/elements/common_configure_reg.rb', line 15

def inst
    return "" if @ghost || @port
"common_configure_reg_interface #(
.ASIZE  (#{asize}),
.DSIZE  (#{dsize})
)#{signal} #{array_inst} ();"
end

#inst_port ⇒ Object 



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# File 'lib/tdl/elements/common_configure_reg.rb', line 23

def inst_port
    return ["common_configure_reg_interface." + @port.to_s,@name.to_s,array_inst]
end