Class: ClassHDL::GenerateBlock

Inherits:
ClearSdlModule show all
Defined in:
lib/tdl/class_hdl/hdl_generate.rb

Instance Attribute Summary collapse

Attributes inherited from SdlModule

#create_tcl, #dont_gen_sv, #ex_down_code, #ex_param, #ex_port, #ex_up_code, #head_import_packages, #instance_and_children_module, #instanced_and_parent_module, #module_name, #origin_sv, #out_sv_path, #path, #real_sv_path, #target_class, #techbench

Instance Method Summary collapse

Methods inherited from ClearSdlModule

#root_sdlmodule

Methods inherited from SdlModule

#<<, #>>, #Always, #AlwaysComb, #Always_comb, #Always_ff, #Assign, #CASE, #CASEX, #Clock, #CommonCFGReg, #DEFAULT, #Def, #FOR, #FOREACH, #Initial, #Inout, #Input, #Instance, #Itgt_Instance, Main, #NameSpaceAdd, #Output, #Parameter, #Parameters, #Reset, #StateMachine, #TrackInf, #TryDef, #WHEN, #__ref_children_modules__, #add_children_modules, #add_parent_modules, #add_to_dve_wave, #add_to_new_module, allmodule_name, #always_ff, #always_sim, #assert, #assert_error, #assert_format_error, #assert_old, base_hdl_ref, #bits, #build_module, #build_module_verb, #call_instance, call_module, #children_inst_tree, #clog2, #debugLogic, #def_struct, #define_ele, echo_tracked_by_dve, #enum, exist_module?, #function, #gen_dev_wave_tcl, gen_dev_wave_tcl, gen_sv_module, #gen_sv_module, #generate, #genvar, #has_inward_inst?, #has_signal?, #implicit_inst_module_method_missing, #initial, #initial_exec, #inout, #input, #instance_draw, #instanced, #inward_inst, #localparam, #logic, #logic_bind_, #macro_add_vcs, #macro_def, #negedge, #output, #parameter, #parents_inst_tree, #path_refs, #port, #posedge, #pretty_ref_hdl_moduls_echo, #ref_modules, #require_package, #root_ref, #rubyOP, #same_clock_domain, #show_ports, #signal, #top_module_ref?, #top_tb_ref?, #track_signals_hash, #tracked_by_dve, tracked_by_dve, #try_call_ele, #urandom_range, #var_common, #vars_define_inst, #vars_exec_inst, #vcs_string, #verify

Constructor Details

#initialize(belong_to_module) ⇒ GenerateBlock

Returns a new instance of GenerateBlock.



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# File 'lib/tdl/class_hdl/hdl_generate.rb', line 20

def initialize(belong_to_module)
    @belong_to_module = belong_to_module
    super("genblk#{globle_random_name_flag()}")
    unless @belong_to_module
        raise TdlError.new("GenerateBlock must have belong_to_module")
    end
end

Dynamic Method Handling

This class handles dynamic methods through the method_missing method

#method_missing(name, *args, &block) ⇒ Object 



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# File 'lib/tdl/class_hdl/hdl_generate.rb', line 29

def method_missing(name,*args,&block)
    ClassHDL::AssignDefOpertor.with_rollback_opertors(:old) do
        ## 优先判断 belong_to_module 有没有定义此方法 
        if root_sdlmodule.respond_to? name 
            root_sdlmodule.send(name,*args,&block)
        elsif SdlModule.exist_module?(name)
        # puts root_sdlmodule
        # if SdlModule.exist_module?(name)
            ClassHDL::ImplicitInstModule.new(name,self)
        else
            @belong_to_module.send(name,*args,&block)
        end
    end
end

Instance Attribute Details

#block_index ⇒ Object

Returns the value of attribute block_index.



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# File 'lib/tdl/class_hdl/hdl_generate.rb', line 19

def block_index
  @block_index
end

Instance Method Details

#ELSE(&block) ⇒ Object 



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# File 'lib/tdl/class_hdl/hdl_generate.rb', line 95

def ELSE(&block)
    if ClassHDL::AssignDefOpertor.curr_assign_block.is_a? HDLAssignGenerateBlock
        head_str = "else begin\n"
        # yield
        tmp_sm = ClearGenerateSlaverBlock.new(self)
        tmp_sm.module_name = "generate_sub_block_#{self.block_index}"
        inst_obj = tmp_sm.instanced("genblk#{self.block_index}",tmp_sm)
        inst_obj.belong_to_module = tmp_sm
        add_children_modules(inst_obj:inst_obj ,module_poit: tmp_sm)

        tmp_sm.instance_exec(&block)
        ClassHDL::AssignDefOpertor.with_rollback_opertors(:old) do 
            body_str = tmp_sm.instance_draw + tmp_sm.vars_exec_inst
            gbody_str = body_str.gsub(/^./){ |m| "    #{m}"}
            self.Logic_inst.push(head_str+gbody_str+"end\n")
        end
    else 
        super(&block)
    end
end

#ELSIF(cond, &block) ⇒ Object 



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# File 'lib/tdl/class_hdl/hdl_generate.rb', line 70

def ELSIF(cond,&block)
    if ClassHDL::AssignDefOpertor.curr_assign_block.is_a? HDLAssignGenerateBlock
        if cond.respond_to?(:instance)
            head_str = "else if(#{cond.instance(:cond)})begin\n"
        else 
            head_str = "else if(#{cond})begin\n"
        end
        # yield
        tmp_sm = ClearGenerateSlaverBlock.new(self)
        tmp_sm.module_name = "generate_sub_block_#{self.block_index}"
        inst_obj = tmp_sm.instanced("genblk#{self.block_index}",tmp_sm)
        inst_obj.belong_to_module = tmp_sm
        add_children_modules(inst_obj:inst_obj ,module_poit: tmp_sm)

        tmp_sm.instance_exec(&block)
        ClassHDL::AssignDefOpertor.with_rollback_opertors(:old) do 
            body_str = tmp_sm.instance_draw + tmp_sm.vars_exec_inst
            gbody_str = body_str.gsub(/^./){ |m| "    #{m}"}
            self.Logic_inst.push(head_str+gbody_str+"end\n")
        end
    else 
        super(cond,&block)
    end
end

#IF(cond, &block) ⇒ Object 



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# File 'lib/tdl/class_hdl/hdl_generate.rb', line 44

def IF(cond,&block)
    if ClassHDL::AssignDefOpertor.curr_assign_block.is_a? HDLAssignGenerateBlock
        if cond.respond_to?(:instance)
            head_str = "\nif(#{cond.instance(:cond, @belong_to_module)})begin\n"
        else 
            head_str = "\nif(#{cond})begin\n"
        end
        # yield
        tmp_sm = ClearGenerateSlaverBlock.new(self)

        tmp_sm.module_name = "generate_sub_block_#{self.block_index}"
        inst_obj = tmp_sm.instanced("genblk#{self.block_index}",tmp_sm)
        inst_obj.belong_to_module = tmp_sm
        add_children_modules(inst_obj:inst_obj ,module_poit: tmp_sm)

        tmp_sm.instance_exec(&block)
        ClassHDL::AssignDefOpertor.with_rollback_opertors(:old) do 
            body_str = tmp_sm.instance_draw + tmp_sm.vars_exec_inst
            gbody_str = body_str.gsub(/^./){ |m| "    #{m}"}
            self.Logic_inst.push(head_str+gbody_str+"end ")
        end
    else 
        super(cond,&block)
    end
end