Class: TechBenchModule

Inherits:
SdlModule show all
Defined in:
lib/tdl/sdlmodule/techbench_module.rb

Constant Summary collapse

@@all_sub_tb = 
[]

Instance Attribute Summary

Attributes inherited from SdlModule

#create_tcl, #dont_gen_sv, #ex_down_code, #ex_param, #ex_port, #ex_up_code, #head_import_packages, #instance_and_children_module, #instanced_and_parent_module, #module_name, #origin_sv, #out_sv_path, #path, #real_sv_path, #target_class, #techbench

Class Method Summary collapse

Instance Method Summary collapse

Methods inherited from SdlModule

#<<, #>>, #Always, #AlwaysComb, #Always_comb, #Always_ff, #Assign, #CASE, #CASEX, #Clock, #CommonCFGReg, #DEFAULT, #Def, #ELSE, #ELSIF, #FOR, #FOREACH, #IF, #Initial, #Inout, #Input, #Instance, #Itgt_Instance, Main, #NameSpaceAdd, #Output, #Parameter, #Parameters, #Reset, #StateMachine, #TrackInf, #TryDef, #WHEN, #__contain_hdl__, #__ref_children_modules__, #_auto_name_incr_index_, #add_children_modules, #add_parent_modules, #add_to_dve_wave, #add_to_new_module, #all_ref_sdlmodules, allmodule_name, #always_ff, #always_sim, #assert, #assert_error, #assert_format_error, #assert_old, base_hdl_ref, #bits, #build_module, #build_module_verb, #call_instance, call_module, #children_inst_tree, #clog2, #contain_hdl, #debugLogic, #def_struct, #define_ele, echo_tracked_by_dve, #enum, exist_module?, #function, gen_dev_wave_tcl, #gen_dev_wave_tcl, #gen_sv_module, #generate, #genvar, #has_inward_inst?, #has_signal?, #implicit_inst_module_method_missing, #initial, #initial_exec, #inout, #input, #instance_draw, #instanced, #inward_inst, #localparam, #logic, #logic_bind_, #macro_add_vcs, #macro_def, #method_missing, #negedge, #output, #parameter, #parents_inst_tree, #path_refs, #port, #posedge, #pretty_ref_hdl_moduls_echo, #ref_modules, #require_hdl, #require_package, #root_ref, #rubyOP, #same_clock_domain, #show_ports, #signal, #top_module_ref?, #top_tb_ref?, #track_signals_hash, #tracked_by_dve, tracked_by_dve, #try_call_ele, #urandom_range, #var_common, #vars_define_inst, #vars_exec_inst, #vcs_string, #verify

Constructor Details

#initialize(name: "tdlmodule", out_sv_path: nil, &block) ⇒ TechBenchModule

Returns a new instance of TechBenchModule.



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# File 'lib/tdl/sdlmodule/techbench_module.rb', line 3

def initialize(name:"tdlmodule",out_sv_path:nil,&block)
    @@all_sub_tb << self
    super(name:name,out_sv_path:out_sv_path,&block)
end

Dynamic Method Handling

This class handles dynamic methods through the method_missing method in the class SdlModule

Class Method Details

.gen_sv_module ⇒ Object 



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# File 'lib/tdl/sdlmodule/techbench_module.rb', line 8

def self.gen_sv_module
    @@all_sub_tb.each do |e|
        e.gen_sv_module
    end
end