Class: OrigenSWD::Driver

Inherits:
Object
  • Object
show all
Includes:
Origen::Registers
Defined in:
lib/origen_swd/driver.rb

Overview

To use this driver the owner model must define the following pins (an alias is fine):

:swd_clk
:swd_dio

Constant Summary collapse

REQUIRED_PINS =
[:swd_clk, :swd_dio]

Instance Attribute Summary collapse

Instance Method Summary collapse

Constructor Details

#initialize(owner, options = {}) ⇒ Driver

Initialize class variables

Examples:

# Create new SWD::Driver object
DUT.new.swd

Parameters:

  • owner (Object)

    Parent object

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 28

def initialize(owner, options = {})
  @owner = owner

  @current_apaddr = 0
  @orundetect = 0
  @trn = 0
  @posedge_clk = '1'
end

Instance Attribute Details

#ownerObject (readonly)

Returns the parent object that instantiated the driver, could be either a DUT object or a protocol abstraction



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# File 'lib/origen_swd/driver.rb', line 13

def owner
  @owner
end

#posedge_clkObject

Returns the value of attribute posedge_clk.



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# File 'lib/origen_swd/driver.rb', line 17

def posedge_clk
  @posedge_clk
end

#trnObject

Customiz-ible ‘turn-round cycle’ (TRN) parameter (in cycles)



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# File 'lib/origen_swd/driver.rb', line 16

def trn
  @trn
end

Instance Method Details

#read(ap_dp, reg_or_val, options = {}) ⇒ Object

Read data from Debug Port or Access Port

Parameters:

  • ap_dp (Integer)

    A single bit indicating whether the Debug Port or the Access Port Register is to be accessed. This bit is 0 for an DPACC access, or 1 for a APACC access

  • reg_or_val (Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit)

    Value to be shifted. If a reg/bit collection is supplied this can be pre-marked for read, store or overlay and which will result in the requested action being applied to the cycles corresponding to those bits only (don’t care cycles will be generated for the others).

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 70

def read(ap_dp, reg_or_val, options = {})
  addr = extract_address(reg_or_val, options.merge(use_reg_or_val_if_you_must: true))
  send_header(ap_dp, 1, addr)       # send read-specific header (rnw = 1)
  receive_acknowledgement(options)
  receive_payload(reg_or_val, options)
  swd_dio.drive(0)
end

#read_ap(reg_or_val, options = {}) ⇒ Object

Write data from Access Port

Parameters:

  • reg_or_val (Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit)

    Value to be shifted. If a reg/bit collection is supplied this can be pre-marked for read, store or overlay and which will result in the requested action being applied to the cycles corresponding to those bits only (don’t care cycles will be generated for the others).

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 56

def read_ap(reg_or_val, options = {})
  reg_or_val, options = nil, reg_or_val if reg_or_val.is_a?(Hash)
  read(1, reg_or_val, options.merge(compare_data: reg_or_val.is_a?(Numeric)))
end

#read_dp(reg_or_val, options = {}) ⇒ Object

Write data from Debug Port

Parameters:

  • reg_or_val (Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit)

    Value to be shifted. If a reg/bit collection is supplied this can be pre-marked for read, store or overlay and which will result in the requested action being applied to the cycles corresponding to those bits only (don’t care cycles will be generated for the others).

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 44

def read_dp(reg_or_val, options = {})
  reg_or_val, options = nil, reg_or_val if reg_or_val.is_a?(Hash)
  read(0, reg_or_val, options.merge(compare_data: reg_or_val.is_a?(Numeric)))
end

#write(ap_dp, reg_or_val, deprecated_wdata = nil, options = {}) ⇒ Object

Write data to Debug Port or Access Port

Parameters:

  • ap_dp (Integer)

    A single bit indicating whether the Debug Port or the Access Port Register is to be accessed. This bit is 0 for an DPACC access, or 1 for a APACC access

  • reg_or_val (Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit)

    Value to be shifted. If a reg/bit collection is supplied this can be pre-marked for read, store or overlay and which will result in the requested action being applied to the cycles corresponding to those bits only (don’t care cycles will be generated for the others).

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 109

def write(ap_dp, reg_or_val, deprecated_wdata = nil, options = {})
  deprecated_wdata, options = nil, deprecated_wdata if deprecated_wdata.is_a?(Hash)

  if deprecated_wdata
    addr = reg_or_val.respond_to?(:address) ? reg_or_val.address : reg_or_val
  else
    addr = extract_address(reg_or_val, options)
  end

  send_header(ap_dp, 0, addr)       # send write-specific header (rnw = 0)
  receive_acknowledgement

  if deprecated_wdata
    if reg_or_val.respond_to?(:data)
      reg_or_val.data = deprecated_wdata
    else
      reg_or_val = deprecated_wdata
    end
  end
  send_payload(reg_or_val, options)
  swd_dio.drive(0)
end

#write_ap(reg_or_val, options = {}) ⇒ Object

Write data to Access Port

Parameters:

  • reg_or_val (Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit)

    Value to be shifted. If a reg/bit collection is supplied this can be pre-marked for read, store or overlay and which will result in the requested action being applied to the cycles corresponding to those bits only (don’t care cycles will be generated for the others).

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 96

def write_ap(reg_or_val, options = {})
  write(1, reg_or_val, options)
end

#write_dp(reg_or_val, options = {}) ⇒ Object

Write data to Debug Port

Parameters:

  • reg_or_val (Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit)

    Value to be shifted. If a reg/bit collection is supplied this can be pre-marked for read, store or overlay and which will result in the requested action being applied to the cycles corresponding to those bits only (don’t care cycles will be generated for the others).

  • options (Hash) (defaults to: {})

    Options to customize the operation



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# File 'lib/origen_swd/driver.rb', line 85

def write_dp(reg_or_val, options = {})
  write(0, reg_or_val, options)
end