Module: YTLJit::GeneratorExtendMixin

Includes:
AbsArch
Included in:
GeneratorExtend
Defined in:
lib/ytljit/asmext.rb

Constant Summary

Constants included from AbsArch

AbsArch::AL, AbsArch::BL, AbsArch::CL, AbsArch::DL, AbsArch::FUNC_ARG, AbsArch::FUNC_ARG_YTL, AbsArch::FUNC_FLOAT_ARG, AbsArch::FUNC_FLOAT_ARG_YTL, AbsArch::INDIRECT_BPR, AbsArch::INDIRECT_RETR, AbsArch::INDIRECT_SPR, AbsArch::INDIRECT_TMPR, AbsArch::INDIRECT_TMPR2, AbsArch::INDIRECT_TMPR3

Constants included from SSE

SSE::XMM0, SSE::XMM1, SSE::XMM2, SSE::XMM3, SSE::XMM4, SSE::XMM5, SSE::XMM6, SSE::XMM7

Instance Attribute Summary collapse

Instance Method Summary collapse

Instance Attribute Details

#funcarg_info ⇒ Object (readonly)

Returns the value of attribute funcarg_info.



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# File 'lib/ytljit/asmext.rb', line 143

def funcarg_info
  @funcarg_info
end

Instance Method Details

#initialize(asm, handler = "ytl_step_handler") ⇒ Object 



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# File 'lib/ytljit/asmext.rb', line 139

def initialize(asm, handler = "ytl_step_handler")
  super
  @funcarg_info = FuncArgInfo.new
end

#nosupported_addressing_mode(inst, dst, src, src2 = nil) ⇒ Object 



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# File 'lib/ytljit/asmext.rb', line 145

def nosupported_addressing_mode(inst, dst, src, src2 = nil)
  case inst
  when :mov
    case src
    when TypedData
      orgaddress = @asm.current_address
      rcode = ""
      rcode, rtype = src.gen_access(self)
      if dst != TMPR then
        rcode += @asm.update_state(call_stephandler) if rcode != ""
        rcode += @asm.update_state(mov(dst, TMPR))
      end
      @asm.current_address = orgaddress
      return [rcode, TypedData.new(rtype, dst)]
    end

  when :movsd
    case src
    when TypedData
      orgaddress = @asm.current_address
      rcode = ""
      rcode, rtype = src.gen_access(self)
      if dst != XMM0 then
        rcode += @asm.update_state(call_stephandler) if rcode != ""
        rcode += @asm.update_state(movsd(dst, XMM0))
      end
      @asm.current_address = orgaddress
      return [rcode, TypedData.new(rtype, dst)]
    end

  when :push
    case dst
    when OpRegXMM
      rcode = ""
      rcode += sub(SPR, 8)
      rcode += mov(INDIRECT_SPR, dst)

      return rcode
    end

  when :pop
    case dst
    when OpRegXMM
      rcode = ""
      rcode += mov(dst, INDIRECT_SPR)
      rcode += add(SPR, 8)

      return rcode
    end

  when :seta, :setae, :setb, :setbe, :setl, :setle, :setg, :setge,
       :setna, :setnae, :setnb, :setnbe, :setnc, :setnle,
       :setno, :seto, :setz, :setnz
    case dst
    when OpReg32, OpReg64
      rcode = ""
      reg8 = [AL, CL, DL, BL][dst.reg_no]
      rcode += send(inst, reg8)
      rcode += self.and(dst, 1)
      return rcode
    end
  end

  case src
  when FunctionArgument
    orgaddress = @asm.current_address
    rcode = ""
    rcode = src.gen_access_src(self, inst, dst, src, src2)
    rcode  += @asm.update_state(call_stephandler)
    @asm.current_address = orgaddress
    return rcode

  when OpRegXMM
    case inst
    when :mov
      return movsd(dst, src)
    end
  end

  case dst
  when FunctionArgument
    orgaddress = @asm.current_address
    rcode = ""
    rcode = dst.gen_access_dst(self, inst, dst, src, src2)
    rcode  += @asm.update_state(call_stephandler)
    @asm.current_address = orgaddress
    return rcode

  when OpRegXMM
    case inst
    when :mov
      return movsd(dst, src)
    end
  end

  super
end