Class: VerilogTools::AST

Inherits:
Object
  • Object
show all
Includes:
Enumerable
Defined in:
lib/HDLRuby/verilog_parser.rb,
lib/HDLRuby/verilog_hruby.rb

Overview

A very basic AST representing the parsed Verilog code. Can be replaced with any other structure by redefining the hook methods.

There are two versions of the AST: the normal AST where each syntax rules is represented by an AST node and the compressed version where each AST node whose type does not bring any information and whose signle child is another AST node is omitted.

An AST consiste of a type, which is a symbol corresponding to a syntax rule, and one or more children which can be:

  • nil: for a child which is not present (optional in the syntax)
  • a string: for a terminal element (e.g., identifier, operator)
  • an AST node
  • an array: for reprenting an iterative rule like: mul_term ( '+' mult_term )* The position of each child corresponds exactly to the represented syntax rule.

Constant Summary collapse

PORT_DECLS =

The types of ports declaration in module ports and items.

[ :input_declaration, :output_declaration,
:inout_declaration ]
TO_HDLRuby =

The generation procedures.

Hash.new( lambda do |ast,state|
  # By default, recurse on the children.
  return ast.map do |child| 
    if child.is_a?(Array) then
      child.map do |sub| 
        sub.is_a?(AST) ? sub.to_HDLRuby(state) : sub.to_s
      end.join
    elsif child.is_a?(AST) then
      child.to_HDLRuby(state)
    else
      child
    end
  end.join
end)

Instance Attribute Summary collapse

Class Method Summary collapse

Instance Method Summary collapse

Methods included from Enumerable

#seach

Constructor Details

#initialize(type, *children) ⇒ AST

Build a new AST +type+ node with +children+.



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# File 'lib/HDLRuby/verilog_parser.rb', line 39

def initialize(type, *children)
  @type = type.to_sym
  @children = children
end

Instance Attribute Details

#type ⇒ Object (readonly)

The type of AST node (should be the name of the syntax rule).



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# File 'lib/HDLRuby/verilog_parser.rb', line 36

def type
  @type
end

Class Method Details

.[](type, *children) ⇒ Object

Create a new AST.



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# File 'lib/HDLRuby/verilog_parser.rb', line 31

def self.[](type,*children)
  return AST.new(type,*children)
end

.ast_to_s(adjust, obj) ⇒ Object

Convert an AST object to a string (for debug purpose mainly).



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# File 'lib/HDLRuby/verilog_parser.rb', line 68

def self.ast_to_s(adjust, obj)
  if obj.is_a?(AST) then
    return (" " * adjust) + "#{obj.type}\n" + 
      (obj.each.compact.map do |c|
        self.ast_to_s(adjust+2, c)
      end).join("\n")
  elsif obj.is_a?(Array) then
    return (" " * adjust)  + "[\n" + (obj.each.map do |c|
      self.ast_to_s(adjust+2, c)
    end).join("\n") + "\n" + (" " * adjust) + "]"
  else
    return (" " * adjust) + "<" + obj.to_s + ">"
  end
end

Instance Method Details

#[](idx) ⇒ Object

Access a child by index +idx+.



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# File 'lib/HDLRuby/verilog_parser.rb', line 45

def [](idx)
  return @children[idx]
end

#each(&ruby_block) ⇒ Object

Iterate over the children.



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# File 'lib/HDLRuby/verilog_parser.rb', line 50

def each(&ruby_block)
  # No ruby block? Return an enumerator.
  return to_enum(:each) unless ruby_block
  # A ruby block? Apply it on each children.
  @children.each(&ruby_block)
end

#generate_error(msg) ⇒ Object

Generate a generation error with message indicated by +msg+.

Raises:



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# File 'lib/HDLRuby/verilog_hruby.rb', line 195

def generate_error(msg)
  property = self[-1]
  lpos = property[:lpos]
  filename = property[:filename]
  # Raise an exception containing an error message made of msg,
  # the adjusted line number, its number, and the column where error
  # happended.
  raise GenerateError.new(msg,lpos,filename)
end

#to_a ⇒ Object

Convert to an array of children.



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# File 'lib/HDLRuby/verilog_parser.rb', line 58

def to_a
  return self.each.to_a
end

#to_HDLRuby(state = HDLRubyState.new) ⇒ Object

Generate HDLRuby text from the current AST node. +state+ is the HDLRuby generation state.



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# File 'lib/HDLRuby/verilog_hruby.rb', line 188

def to_HDLRuby(state = HDLRubyState.new)
  # Execute the generation procedure corresponding to the type.
  return TO_HDLRuby[self.type].(self,state)
end

#to_s ⇒ Object

Convert to an ast string.



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# File 'lib/HDLRuby/verilog_parser.rb', line 63

def to_s
  return AST.ast_to_s(0,self)
end