Class: TestUnitModule

Inherits:
SdlModule show all
Defined in:
lib/tdl/sdlmodule/test_unit_module.rb

Overview

TestUnitModule 是在编译完 TopModule TB后才会运行

Instance Attribute Summary

Attributes inherited from SdlModule

#create_tcl, #dont_gen_sv, #ex_down_code, #ex_param, #ex_port, #ex_up_code, #head_import_packages, #instance_and_children_module, #instanced_and_parent_module, #module_name, #origin_sv, #out_sv_path, #path, #real_sv_path, #target_class, #techbench

Class Method Summary collapse

Instance Method Summary collapse

Methods inherited from SdlModule

#<<, #>>, #Always, #AlwaysComb, #Always_comb, #Always_ff, #Assign, #CASE, #CASEX, #Clock, #CommonCFGReg, #DEFAULT, #Def, #ELSE, #ELSIF, #FOR, #FOREACH, #IF, #Initial, #Inout, #Input, #Instance, #Itgt_Instance, Main, #NameSpaceAdd, #Output, #Parameter, #Parameters, #Reset, #StateMachine, #TrackInf, #TryDef, #WHEN, #__contain_hdl__, #__ref_children_modules__, #_auto_name_incr_index_, #add_children_modules, #add_parent_modules, #add_to_dve_wave, #add_to_new_module, #all_ref_sdlmodules, allmodule_name, #always_ff, #always_sim, #assert, #assert_error, #assert_format_error, #assert_old, base_hdl_ref, #bits, #build_module, #build_module_verb, #call_instance, call_module, #children_inst_tree, #clog2, #contain_hdl, #debugLogic, #def_struct, #define_ele, echo_tracked_by_dve, #enum, exist_module?, #function, #gen_dev_wave_tcl, gen_dev_wave_tcl, gen_sv_module, #gen_sv_module, #generate, #genvar, #has_inward_inst?, #has_signal?, #implicit_inst_module_method_missing, #initial, #initial_exec, #inout, #input, #instance_draw, #instanced, #inward_inst, #localparam, #logic, #logic_bind_, #macro_add_vcs, #macro_def, #method_missing, #negedge, #output, #parameter, #parents_inst_tree, #path_refs, #port, #posedge, #pretty_ref_hdl_moduls_echo, #ref_modules, #require_hdl, #require_package, #root_ref, #rubyOP, #same_clock_domain, #show_ports, #signal, #top_module_ref?, #top_tb_ref?, #track_signals_hash, tracked_by_dve, #tracked_by_dve, #try_call_ele, #urandom_range, #var_common, #vars_define_inst, #vars_exec_inst, #vcs_string, #verify

Constructor Details

#initialize(name: "tdlmodule", out_sv_path: nil) ⇒ TestUnitModule

Returns a new instance of TestUnitModule.



210
211
212
213
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 210

def initialize(name: "tdlmodule",out_sv_path: nil)
    super(name: name,out_sv_path: out_sv_path)
    # @dve_wave_signals = []
end

Dynamic Method Handling

This class handles dynamic methods through the method_missing method in the class SdlModule

Class Method Details

.be_instanced_by_sim ⇒ Object 



241
242
243
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 241

def self.be_instanced_by_sim
    @@__be_instanced_by_sim__ || []
end

.echo_be_instanced_by_sim ⇒ Object 



245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 245

def self.echo_be_instanced_by_sim
    @@__be_instanced_by_sim__ ||= []

    _module_name = []
    _ref_module_name = []
    _signal_name = []
    _ref_module_path = []

    _max_module_name = 'test_module'.size 
    _max_signal_name = 'SIGNAL'.size 
    _max_ref = 'REF_MODULE'.size
    @@__be_instanced_by_sim__.each do |tm|
        __root_ref_eles__ = tm.root_ref_eles

        __root_ref_eles__.each do |ele|
            _module_name << tm.module_name
            _ref_module_name << ele.belong_to_module.module_name
            _signal_name << ele.to_s 
            _ref_module_path << File.expand_path(ele.belong_to_module.real_sv_path)

            if tm.module_name.size > _max_module_name
                _max_module_name    = tm.module_name.size 
            end 

            if ele.belong_to_module.module_name.size > _max_ref
                _max_ref  = ele.belong_to_module.module_name.size 
            end 

            if ele.to_s.size > _max_signal_name
                _max_signal_name = ele.to_s.size 
            end
        end
    end

    collect = ["[%5s]    %-#{_max_module_name}s    %#{_max_ref}s  %-#{_max_signal_name}s    %s" % ['index', 'TEST-MODULE','REF-MODULE','SIGNAL', 'REF-MODULE-PATH'] ] 

    _module_name.each_index do |index|
        collect << "[%5d]    %-#{_max_module_name}s    %#{_max_ref}s  %-#{_max_signal_name}s    %s" % [index+1, _module_name[index], _ref_module_name[index], _signal_name[index], _ref_module_path[index]]
    end

    collect.join("\n")
end

.gen_dve_tcl(filepath) ⇒ Object 



289
290
291
292
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 289

def self.gen_dve_tcl(filepath)


end

Instance Method Details

#add_root_ref_ele(*eles) ⇒ Object 



226
227
228
229
230
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 226

def add_root_ref_ele(*eles)
    @__root_ref_eles__ ||= []
    @__root_ref_eles__ += eles
    @__root_ref_eles__.uniq!
end

#be_instanced_by_sim ⇒ Object 



236
237
238
239
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 236

def be_instanced_by_sim
    @@__be_instanced_by_sim__ ||= []
    @@__be_instanced_by_sim__ << self
end

#root_ref_eles ⇒ Object 



232
233
234
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 232

def root_ref_eles 
    @__root_ref_eles__ || []
end

#test_unit_init(&block) ⇒ Object 



215
216
217
218
219
220
221
222
223
224
 
# File 'lib/tdl/sdlmodule/test_unit_module.rb', line 215

def test_unit_init(&block)
    Initial do 
        to_down_pass    <= 1.b0
        initial_exec("wait(from_up_pass)")
        initial_exec("$root.#{TopModule.current.techbench.module_name}.test_unit_region = \"#{module_name}\"")
        initial_exec("$display(\"--------------- Current test_unit <%0s> --------------------\", \"#{module_name}\")")
        block.call ## collect __root_ref_eles__ at here
        to_down_pass    <= 1.b1
    end
end